Flashing the Cairnsmore1 FPGA with Impact

[SidgripModerator]

These are the steps I used to successfully flash the Cairnsmore1 FPGA:

Download -> Controller & Bitstream

Flashing the Controller

1. Turn Switch 6 off
2. Connect the jtag (Xilinx DLC9G) to the controller jtag port
3. Power up the fpga
4. Start Impact “configure device using boundary-scan (JTAG)” click OK
5. Assign Configuration file “hashvoodoo_controller_25.bit”
6. Right Click “Program Flash and Load FPGA”
7. Power Off CM1
— if you are receiving an error when programing the flash, power off CM1, turn switch 3 off & flash again.

Flashing the FPGA Array

1. Turn Switch 6 on and turn Switch 3 off
2. Connect the jtag (Xilinx DLC9G) to the fpga array jtag port
3. Power up fpga
4. Start New Project in Impact “configure device using boundary-scan (JTAG)” click OK
5. Assign Configuration file “CM1-hv-v04a-175MHz-ucf-150-fmax-161.bit”
6. Attach SPI/BPI Prom click YES select “CM1-hv-v04a-175MHz-ucf-150-fmax-161.mcs” select [SPI PROM] [M25P128] Data width: 1 <–Repeat for all four fpga’s
7. Device Programming Properties: Click “OK”
8. Right Click on “Flash” and select “Program” <— repeat for all four fpga’s
9. Power off CM1 and turn Switch 3 on

Now you can power cycle the fpga and the Blake bitstream will still be there.

All other support for the Cairnsmore1

I was able to figure this out by reading trough the post’s on Bitcointalk

Thanks to kramble and BlueDragon747 for making this work!

• This topic was modified 7 years, 9 months ago by  Sidgrip.
• This topic was modified 7 years, 9 months ago by  Sidgrip.
• This topic was modified 7 years, 5 months ago by  Sidgrip.
• This topic was modified 7 years, 5 months ago by  Sidgrip.
• This topic was modified 7 years, 5 months ago by  Sidgrip.
• This topic was modified 7 years, 5 months ago by  Sidgrip.
• This topic was modified 7 years, 5 months ago by  Sidgrip.
• This topic was modified 7 years, 5 months ago by  Sidgrip.
• This topic was modified 7 years, 2 months ago by  Sidgrip.

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