These are the steps I used to successfully flash the Lancelot FPGA:
1. Connect the jtag (from left to right: VCC/GND/TCK/TDO/TDI/TMS)
2. Power up fpga
3. Start Impact “configure device using boundary-scan (JTAG)” click OK
4. Assign Configuration file “blakeminer_FourGatexClk_3core_fmax-102.bit”
5. Attach SPI/BPI Prom click YES select “blakeminer_FourGatexClk_3core_fmax-102.mcs”
-select [SPI PROM] [W25Q64BV/cv] Data width: 1
6. Press ok
7. Program the “Flash” for both chip’s
–(if programing the flash is not taking refer to step 6 & 7 in the Icarus guide)
Now you can power cycle the fpga and the Blake bitstream will still be there.
No doubt, training technologies are reducing costs and has made training more convenient. In my point of view use of recent training https://www.topdissertations.org/thesisrush-review/ instead of traditional instructor is more helpful. I think we should motivate use of recent training technology.